1. Field of the Invention
The present invention relates to circuitry for interconnecting integrated circuit (IC) chips with other circuitry. More particularly, the present invention relates to input, output, and power supply pads formed on an IC chip, and to electrically conductive lines used to carry electrical signals or power from such pads to circuitry on the IC chip. Still more particularly, the present invention relates to such pads and electrically conductive lines having increased current and power carrying capacity.
2. Description of the Related Art
In order to receive and supply signals and power, IC chips include a plurality of metal pads to which wires from other circuitry can be bonded. Such a pad typically comprises a rectangular layer or layers of metal formed on the surface of the IC chip, with each edge of such rectangular layers being in a range from about 100 to 150 microns. The pads are generally arranged in concentric rectangular rings around the periphery of the IC chip. The pads in each ring are spaced apart to prevent electrical conduction directly between pads, with such spacing typically being in a range from about 150 to 200 microns. Each pad is connected to other circuitry on the IC chip by an electrically conductive line which typically comprises one or more layers of metal formed on the surface of the IC chip.
Complex IC chips often have more than one such ring of pads. Where more than one ring is used, the pads in each ring are often staggered. For example, where two rings of pads are used, each pad of an outer ring is disposed adjacent to a spacing between two pads of an inner ring. This allows the conductive lines for the outer ring to fit between the pads of the inner ring, and thus prevents electrical conduction directly between a pad of the inner ring and an electrical conduction line for a pad of the outer ring. Staggering pads helps to increase the number of pads possible on each chip by allowing for two or more concentric rings of pads on the same IC chip.
Compared to the size of typical transistors of an IC chip, pads are extremely large. Consequently, IC chips can become pad limited. This basically means that the pads are taking up a large percentage of the available space on the surface of the IC chip, thus limiting the amount of space remaining to hold other circuitry. One way of alleviating this problem is to allow a pad to perform more than one function. For example, it is common to connect a pad to an input/output buffer.
The input/output buffer allows the pad both to output signals from the IC chip and to receive signals for the IC chip.
While using input/output buffers helps to reduce the number of pads used for carrying signals, it does not help to reduce the number of pads used for supplying power to an IC chip. The amount of power that a single pad can supply to the IC chip is generally limited by the size of the conductive line connected to that pad. A wider conductive line typically can carry more power than a narrower line. However, in the conventional staggered pad configuration described above, the width of the conductive lines is limited by the spacing between the pads of an inner ring or rings. To increase the width of such a conductive line beyond this limit, the spacing between pads must be increased, thus reducing the total number of pads possible on the IC chip.
There is thus a continuing need in the field of integrated circuit electronics for pads and conductive lines that can carry increased quantities of power and current to an IC chip without the need for increasing the spacing between pads encountered in convention IC chip design. Such improved pads and conductive lines should preferably be able to reduce the total number of pads required for supplying power to the IC chip, and thus free space on the IC chip for either additional circuitry or additional pads for carrying signals. Such improved pads should also preferably be usable for supplying power, carrying signals, or both.